Xylon ISP Studio is a PC application that simplifies and accelerates High Dynamic Range (HDR) Image Signal Processing (ISP) pipeline development for AMD FPGA and adaptive SoC devices. It supports Xylon’s logicBRICKS IP cores (logiISP-UHD, logiHDR), software-controlled ISP functions like Auto White Balancing, and integration of custom third-party models.
Presentation of the Xylon logicBRICKS HDR ISP IP Suite
Bit-accurate models of Xylon’s IP cores enable fast and precise simulation of complete ISP pipelines, supporting full evaluation of parallel architectures, fine-tuning for specific camera and lens combinations, and generation of configuration parameters for AMD development tools.
All hardware and software settings, along with input video and output results, are managed through the XYLON ISP Studio GUI. Both still and moving images captured from the target camera can be used as simulation inputs. Complex simulations run in minutes on a standard PC—eliminating the need for hardware validation and saving hours per iteration. This enables rapid tuning and testing of multiple ISP variants.
The entire setup and evaluation process can be handled by ISP specialists without requiring FPGA expertise. In addition to subjective image quality assessment, the tool offers advanced statistical analysis for accelerated pipeline optimization.
Support for third-party modules—either software-based or IP cores—enables future integration of partner models from other ISP pipelines, regardless of SoC type or vendor.
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Key Benefits
- Use GUI to build ISP for AMD FPGA and SoC
- Evaluate and tune parallel ISP pipelines in minutes
- Bit-accurate, no need for hardware retesting
- Supports Xylon logicBRICKS HDR ISP IP cores
Some Application Details  | Construct the ISP Pipeline
Construct the ISP pipeline by combining various ISP sub-modules - such as CFA de-mosaicing, gamma correction, different noise filter, color space converters, and other sub-modules. Individually setup parameters for each sub-module.
Import of third-party modules is possible. |
 | Evaluate multiple ISP Pipelines in a parallel
Define two or more parallel ISP pipeline architectures and run all models simultaneously! Branches within the pipelines are marked by larger sub-module blocks. This approach allows for the evaluation of multiple ISP architectures at the hardware level—without the need for actual hardware implementation! |
 | Compare image processing results
The Xylon ISP Studio application generates image processing results at the output of each sub-module and enables convenient comparison of image quality produced by multiple ISP pipelines under evaluation. |
 | Image analysis
Image processing results are not only subject to subjective image quality assessment but can also be analyzed using advanced statistical analysis tools. Results are obtained within minutes, with no need for hardware retesting. |
 | Export implementation data
The entire ISP setup and evaluation process can be handled by ISP specialists without requiring FPGA expertise. However, the ISP Studio exports configuration parameters for the selected ISP pipeline architectures, which can then be imported into the AMD Vivado Design Suite for the quick implementation of the ISP pipeline setup.
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| If you’d like to evaluate the application or learn more, feel free to CONTACT US! |